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Commit 82c7ea4e authored by Florian Ziemen's avatar Florian Ziemen
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More explicit headings and sub-headings

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1 merge request!74Memory hierarchies lecture
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...@@ -63,7 +63,7 @@ Based on figure from "Computer Architecture" by _J. Hennessy_ and _D. Patterson_ ...@@ -63,7 +63,7 @@ Based on figure from "Computer Architecture" by _J. Hennessy_ and _D. Patterson_
## Access time example (1/2) {.leftalign} ## Disk I/O timings {.leftalign}
<!-- <!--
File `data.py`: File `data.py`:
...@@ -184,7 +184,7 @@ $^*$: Lower than one due to caching effects ...@@ -184,7 +184,7 @@ $^*$: Lower than one due to caching effects
## Access time example (2/2) {.leftalign} ## Disk I/O {.leftalign}
- Reading/writing to file is rather expensive - Reading/writing to file is rather expensive
- If necessary during computation, try doing it asynchronously - If necessary during computation, try doing it asynchronously
...@@ -200,6 +200,7 @@ $^*$: Lower than one due to caching effects ...@@ -200,6 +200,7 @@ $^*$: Lower than one due to caching effects
## First model version ## First model version
One layer of RAM cache between the CPU and the disk.
:::{.r-stack} :::{.r-stack}
...@@ -224,6 +225,7 @@ $^*$: Lower than one due to caching effects ...@@ -224,6 +225,7 @@ $^*$: Lower than one due to caching effects
## Second model version ## Second model version
Three layers of caches
:::{.r-stack} :::{.r-stack}
...@@ -270,7 +272,7 @@ T_{avg,s} &= H_1 T_1 + ((1-H_1)\cdot H_2)\cdot(T_1+T_2)\\ ...@@ -270,7 +272,7 @@ T_{avg,s} &= H_1 T_1 + ((1-H_1)\cdot H_2)\cdot(T_1+T_2)\\
# Processor techniques # Processor techniques
## Third model version ## The general view
:::{.r-stack} :::{.r-stack}
......
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