From 82c7ea4e52047af1b7a2b4c35d45a5ef46a89095 Mon Sep 17 00:00:00 2001
From: Florian Ziemen <ziemen@dkrz.de>
Date: Thu, 27 Jun 2024 15:08:24 +0200
Subject: [PATCH] More explicit headings and sub-headings
---
lectures/memory-hierarchies/slides.qmd | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/lectures/memory-hierarchies/slides.qmd b/lectures/memory-hierarchies/slides.qmd
index 6166d31..95fd6a3 100644
--- a/lectures/memory-hierarchies/slides.qmd
+++ b/lectures/memory-hierarchies/slides.qmd
@@ -63,7 +63,7 @@ Based on figure from "Computer Architecture" by _J. Hennessy_ and _D. Patterson_
-## Access time example (1/2) {.leftalign}
+## Disk I/O timings {.leftalign}
<!--
File `data.py`:
@@ -184,7 +184,7 @@ $^*$: Lower than one due to caching effects
-## Access time example (2/2) {.leftalign}
+## Disk I/O {.leftalign}
- Reading/writing to file is rather expensive
- If necessary during computation, try doing it asynchronously
@@ -200,6 +200,7 @@ $^*$: Lower than one due to caching effects
## First model version
+One layer of RAM cache between the CPU and the disk.
:::{.r-stack}
@@ -224,6 +225,7 @@ $^*$: Lower than one due to caching effects
## Second model version
+Three layers of caches
:::{.r-stack}
@@ -270,7 +272,7 @@ T_{avg,s} &= H_1 T_1 + ((1-H_1)\cdot H_2)\cdot(T_1+T_2)\\
# Processor techniques
-## Third model version
+## The general view
:::{.r-stack}
--
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