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82c7ea4e
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82c7ea4e
authored
10 months ago
by
Florian Ziemen
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!74
Memory hierarchies lecture
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#71821
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10 months ago
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lectures/memory-hierarchies/slides.qmd
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82c7ea4e
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@@ -63,7 +63,7 @@ Based on figure from "Computer Architecture" by _J. Hennessy_ and _D. Patterson_
##
Access time example (1/2)
{.leftalign}
##
Disk I/O timings
{.leftalign}
<!--
File `data.py`:
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@@ -184,7 +184,7 @@ $^*$: Lower than one due to caching effects
##
Access time example (2/2)
{.leftalign}
##
Disk I/O
{.leftalign}
- Reading/writing to file is rather expensive
- If necessary during computation, try doing it asynchronously
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@@ -200,6 +200,7 @@ $^*$: Lower than one due to caching effects
## First model version
One layer of RAM cache between the CPU and the disk.
:::{.r-stack}
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@@ -224,6 +225,7 @@ $^*$: Lower than one due to caching effects
## Second model version
Three layers of caches
:::{.r-stack}
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@@ -270,7 +272,7 @@ T_{avg,s} &= H_1 T_1 + ((1-H_1)\cdot H_2)\cdot(T_1+T_2)\\
# Processor techniques
## Th
ird model version
## Th
e general view
:::{.r-stack}
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